Masterclock D232 Datový list stáhnout pdf (Strana 192)

Electrical Specifications

9-14 Intel

E8870 Scalable Node Controller (SNC) Datasheet

Table 9-27. CMOS 1.5V AC Parameters

a,b

a. Supply voltage at 1.5V ±5% tolerance.

b. Clock delay is in reference to the 200 MHz clock.

Symbol Parameter Min Max Unit Notes

Tco Clock to Output Valid Delay –0.28 1.44 ns

c. Specification doesn’t apply to RESETO#.

Tsu Input Setup Time 0.84 ns

Thold Input Hold Time 0.35 ns

SRf Output Slew Rate Fall 2.00 5.00 V/ns

SRr Output Slew Rate Rise 1.90 4.9 V/ns

Signal: RESETO#

Tco Clock to Output Valid Delay 1.35 ns

Table 9-28. CMOS1.5 I/O OD AC Parameters

Symbol Parameter Min Max Unit Notes

Signals: EV[3:0]#, ERR[2:0]#

Tco Clock to Output Valid Delay 6.45 ns

Tsu Input Setup Time 0.85 ns

Thold Input Hold Time –0.73 ns

SRf Output Slew Rate Fall 0.25 0.91 V/ns

SRr Output Slew Rate Rise 0.37 1.18 V/ns

Signal: SP{0/1}GPIO[1:0]

Tco Clock to Output Valid Delay 4.8 ns

Tsu Input Setup Time 0.84 ns

Thold Input Hold Time –0.78 ns

SRf Output Slew Rate Fall 0.25 0.91 V/ns

SRr Output Slew Rate Rise 0.37 1.18 V/ns

Table 9-29. CMOS 1.8V AC Parameters

Symbol Parameter Min Max Unit Notes

Tco Clock to Output Valid Delay 0.5 2.5 ns

SRf Output Slew Rate Fall 1 3 V/ns

SRr Output Slew Rate Rise 1 3 V/ns

Table 9-30. CMOS 3.3 V AC Parameters

a,b

Symbol Parameter Min Max Unit Notes

Tco Clock to Output Valid Delay 0.9 3.9 ns

Tsu Input Setup Time 1 ns

Thold Input Hold Time 0 ns

1 2 ... 187 188 189 190 191 192 193 194 195 196 197 ... 239 240

Žádné komentáře

Masterclock D232 Datový list Strana 192